Assistant Director, International Relationship,
Professor, Department of Embedded Technology
School of Electronics Engineering - SENSE
VIT University, Vellore – 632 014, TN, India
 arunm@vit.ac.in, ir2@vit.ac.in
Mob:+91 99425 33393  Ph.:+91 416 220 2038

Experience 18 Years 

Academic
Research Area

High-Performance Heterogeneous Computing:
Objective of High-Performance Heterogeneous Computing is to exploit the advantages of Custom of the Shelf (COTS) heterogeneous computing platform (GPU+FPGA+CPU) to accelerate data and compute intensive applications which require task parallelism, data parallelism and pipelining and are distributed to CPU, GPU and FPGA respectively which will yield higher throughput due to their combined spatial and temporal benefits.

Information and Network Security :
High speed and traffic of future Internet faces the challenges of its efficiency. Intensive and inclined growth of the digital data also require effective sorting and searching algorithms. Objective of the research is to develop power, time and space effective algorithms and  hardware accelerators

Projects
  • PG - Generic Device Driver for Network Interface Card (NIC) using Blue cat Linux – Sponsored by Orane Technologies, Bangalore
  • UG - Microprocessor based multi channel fault monitoring system for rubber molding machine (Desma Werke) – Sponsored by TVS Rubber, Madurai Madurai
Research Supervisor
  • VIT University, Vellore
  • Research supervisor of Anna University, Chennai
Fund Generated (Rs.28,50,000.00

  • A RFID Implementation for location and proximity sensing for the Blind Users – FAER, Motorola, Bangalore  – Rs.50,000.00 – 6 Months
  • Generic Automated Irrigation system using CPLD – TNSCST, Chennai – Rs.5,000.00 – 6 Months
  • Seminar grant - Department of Information Technology - NCCTIRD 2012 – Rs. 20,000.00 – February 2012
  • Seminar grant - CSIR – NCCTIRD 2012 -  Rs.50,000.00 - February 2012
  • Seminar grant - CSIR - National Workshop on RF Design using PLC Prototyping - Rs. 20,000.00 - Dec 2012
  • Advanced Embedded System Laboratory - MODROBS - AICTE - Rs.6,73,000.00 – 2 Years - Dec 2012
  • High Performance sorting algorithms for Bioinformatics Applications - Research Promotional Scheme - AICTE - Rs. 16,50,000.00 - Dec 2012
  • SEED Research Fund - VIT University, Vellore - Rs.50,000.00 - 1 Year - Aug 2013
  • SEED Research Fund - VIT University, Vellore - Rs.1,00,000.00 - 1 Year - Jan 2014
  • SEED Research Fund - VIT University, Vellore - Rs.2,00,000.00 - 1 Year - Jan 2018
  • University Professor Partnership Programme – Nvidia – Rs.24,700 – I Year – July 2014
Patent / IPR
  • Amandeep Vaish and Dr. Arun Manoharan, "A system and method for printing electrical circuits on insulating surfaces", Indian Patent Filed 202041032249, 28th July 2020.
Book
  1. Arun Manoharan, Hemprasad Patil, Sujatha Rajkumar, Usharani Seshasayee, "Emerging Trends in Artificial Intelligence for Internet of Things", Department of Embedded Technology, Vellore Institute of Technology, ISBN- 9789389640083, Vol. I, Dec 2019.
  2. Arun Manoharan, "High Speed Signature Detection Architectures for Network Applications - FPGA based Reconfigurable Architectures", LAP LAMBERT Academic Publishing, Germany, First Edition, 2012. (ISBN 978-3-659-24982-2) @Amazon.
  3. Sureshkumar Nagarajan, Arun Manoharan, "Accuracy Analysis of Satellite Image Classifiction Techniques" LAP LAMBERT Academic Publishing, Germany, First Edition, 2016.(ISBN 978-3-330-01382-7)
  4. Sureshkumar Nagarajan, Arun Manoharan, Arunkumar S, Anand S, "Advanced Image Processing Techniques and Applications" IGI Global Publications, Feb 2017. ISBN: 9781522520535
  5. Ajitha Sukumaran, Arun M, "A Brief Review of Conventional and Deep Learning Approaches in Facial Emotion Recognition", Emerging Trends in Artificial Intelligence for Internet of Things, ISBN- 9789389640083, Vol. I, Dec 2019.
  6. Barua, S., Patil, H., Desai, P.D., Arun, M., Deep learning-based smart colored fabric defect detection system, Advances in Intelligent Systems and Computing, Springer 2020, 1155, pp. 212-219.
Journals  Google Scholar H Index

  1. Jabarullah, N.H., Geetha, E., Arun, M., Vakhnina, V., "Design, analysis, and implementation of a new high step-up DC–DC converter with low input current ripple and ultra-high-voltage conversion ratio", IET Power Electronics, 13 (15), pp. 3243-3253, 2020.
  2. Priyadharshni, M., Chathalingathu, A., Kumaravel, S., Manoharan, A., Veeramachaneni, S., Mahammad, S.N., "Logically Optimal Novel 4:2 Compressor Architectures for High-Performance Applications, Arabian Journal for Science and Engineering, 45 (8), pp. 6199-6209, 2020.
  3. Subam Mahajan, L. N. Sirisha Mrunalini and Arun M, "Dual Band Graphene Based Hexagonal Patch Antenna in Terahertz Regime for Biomedical Applications" Optik, Under Review, Sep 2020.
  4. Surendar, A., Kavitha, M., Arun, M., Panwar, V., “Reliability Assessment of Solder Joints in Electronic Devices under Extreme Thermal Fluctuations”, IEEE Transactions on Components, Packaging and Manufacturing Technology, 2020, 10(8), pp. 1394-1400.
  5. Jabarullah, N.H., Surendar, A., Arun, M., Siddiqi, A.F., Krasnopevtseva, T., “Microstructural Characterization and Unified Reliability Assessment of Aged Solder Joints in a PV Module”, IEEE Transactions on Components, Packaging and Manufacturing Technology, 2020, 10(6), pp. 1028-1034. 
  6. Siswanto, W.A., Arun, M., Krasnopevtseva, I.V., Surendar, A., Maseleno, A., “A competition between stress triaxiality and joule heating on microstructure evolution and degradation of SnAgCu solder joints”, Journal of Manufacturing Processes, 2020, 54, pp. 221-227.
  7. Bellamkonda Saidulu, Arun Manohran , “Energy efficient and low noise OTA with improved NEF for Neural Recording Applications”, International Journal of Biomedical Engineering and Technology, Inderscience, 32 (3), pp. 199-216, 2020.
  8. Barua, S., Patil, H., Desai, P.D., Arun, M., "Deep learning-based smart colored fabric defect detection system", Advances in Intelligent Systems and Computing, pp. 212-219, 2020.
  9. S.Saravanan, S.Sathish Kumar, M.Arun, Xiao ZhiGao, M.Nithyakumar, "Certain Study on Fabrication of Reversible Quantum Dot Photonic Integrated Circuit", Caribbean Journal of Science, ISSN: 0008-6452, Vol. 53, No. 2, 2019.
  10. A Surendar, M Arun, AM Basha, "FFcPsA: a fast finite conventional state using prefix pattern gene search algorithm for large sequence identification", Soft Computing, Vol.23, No.8, pp.2761-2771, 2019.
  11. Rajkumar, S., Arun, M., Hirwani, J., Sanjeev, S.S., "Predictive analysis of crops cultivation for a smart green environment using azure services", International Journal of Recent Technology and Engineering, 7 (5), pp. 295-298, 2019.
  12. Anish Chandran, Arun Manoharan, "Optimization of Tridiagonal Matrix Algorithm [TDMA] on Multicore Architectures: Computational framework and mathematical modelling", International  Journal of Grid and High Performance Computing, Volume 11, Issue 4, Article 1, 2019 (140917-052547).
  13. Rajkumar, S., Arun, M., Hirwani, J., Sanjeev, S.S., “Predictive analysis of crops cultivation for a smart green environment using azure services”, International Journal of Recent Technology and Engineering, 2019, 7(5), pp. 295-298.
  14. Jayanthi Chandrashekar and Arun Manoharan, "SAMR: Discovery of Short Distance and Secured Routing in MANET", Journal of Engineering and Applied Sciences, Vol.14, No.18, pp. 6675-6684, 2019.
  15. Jayanthi Chandrashekar and Arun Manoharan, "An Identity Based Key Management Technique for Secure Routing in MANET", International Journal of Intelligent Engineering and Systems, Vol.11, No.06, pp.33-43, 2018.
  16. L. N. Sirisha Mrunalini and Arun M , "Dual-Band Reconfigurable Graphene based Patch antenna in Terahertz band for WNoC Applications", IET Microwaves, Antennas  Propagation, August 2017.
  17. Bellamkonda Saidulu, Arun Manoharan and Kumaravel Sundaram, "Low Noise Low Power CMOS Telescopic-OTA for Bio-Medical Applications", MDPI Computers, Vol.5, No.4, pp. 1-11, 2016. 
  18. Bellamkonda Saidulu and Arun Manoharan, “Design of Low Power Amplifier for Neural Recording Applications using Inversion Coefficient Methodology”, International Journal of Control Theory and applications, No.10 (6) , pp.719-727, 2017.
  19. Bellamkonda Saidulu, Arun Manoharan, Bhavani B, “An improved CMOS voltage bandgap reference circuit”, Advances in Intelligent Systems and Computing, Springer, 2017. (Accepted)
  20. Bellamkonda Saidulu, Arun Manoharan, Bhavani B, “Power And Area Efficient TFET(20nm) Based Two Stage Opamp For Ultra Low Power Applications, Lecture Notes in Electrical Engineering, Springer, 2017 (Accepted).
  21. Sureshkumar N, Arun, M., “A Genetic Based Feature Selection For Classification Of Landcover Changes Using Combination Of Lands”, International Journal of Bio-Inspired Computation, Inderscience, 2017, 10(3), pp. 172-187.
  22. Sureshkumar N, Arun, M., “Accuracy Analysis of Various Classification Algorithms for Used Land, Study Area Vellore, India”, International journal of Enterprise Network Management, Inderscience, Vol.7 No.2, pp.113-132, 2016.
  23. Sureshkumar N, Arun, M., “Remote Sensing Image Retrieval Using Object Based, Semantic, Classifier Techniques”, International Journal of Information and Communication Technology, Inderscience, 13(1), pp. 68-82, 2018.
  24. Sureshkumar N, Arun, M., “Mapping of Land Cover Changes in Vellore District by Using Remote Sensing Image”, International Journal of Enterprise Network Management, Inderscience, Accepted, 2016.
  25. Sureshkumar N, Arun, M., “Deforestation Identification Model Using Satellite Images by Colour Based Segmentation”, International Journal of PharmTech Research, Vol.8, No.4, pp. 776-781, 2015.
  26. Sureshkumar N, Arun, M., “Enhanced Classification Algorithms for the Satellite Image Processing, Indian Journal of Science and Technology, Vol.8, No.15, 2015.
  27. Surendar, A.Arun, M., “Efficient DNA sequence analysis for reduced gene selection using frequency analysis”,  Journal of Chemical and Pharmaceutical Sciences 9(4), pp. 3367-3373, 2016.
  28. Surendar, A.Arun, M., “FPGA based multi-level architecture for next generation DNA sequencing”, Biomedical Research (India)2016, pp. S75-S79.
  29. Surendar, A.Arun, M.Basha, A.M., “Micro sequence identification of bioinformatics data using pattern mining techniques in FPGA hardware implementation”, Asian Journal of Information Technology15(1), 2016, pp. 76-81.
  30. M. Arun, A. Anudeep Kumar Reddy, V. Thulasiram, “Optimal Resource Allocation and Power Management for Mobile-To-Mobile Communication in Cellular Network”, Indian Journal of Science and Technology, Vol.8, S1, pp. 235-241, 2015.
  31. Rakesh Kumar Achar, M. Swagath Babu, M. Arun, “Border Gateway Protocol Performance and its Protection against Disturbed Denial of Service attack”, Indian Journal of Science and Technology, Vol.8, S2, pp. 127-132, 2015.
  32. M. Arun, P. Saravanan, "Reversible Arithmetic Logic Gate (ALG) for Quantum Computation",  International Journal of Intelligent Engineering and Systems, Japan, Vol. 6, No.3, pp.1-10, 2013.
  33. A. Surendar, M. Arun and Dr.P.S. Periasamy, "Hardware Based Algorithms for Bioinformatics Applications – A Survey", International Journal of Applied Engineering Research, Vol. 8, No. 6, pp.745-754, 2013.
  34. Arun, M. and Krishnan, A. "High performance Signature Detection Architectures for Network Applications", International Journal of Inovative Computing, Information and Control, Kyushu Tokia University, Japan. (Accepted, September 2011.)
  35. Arun, M. and Krishnan, A. “Functional Verification of Signature Detection Architectures for High Speed Network Applications”, International Journal of Automation and Computing, Springer Vol. 9, No. 4, pp.395-402, 2011.
  36. Arun, M. and Krishnan, A. “Power Analysis of Multiple Hashing Bloom Filter Architecture for Network Applications”, International Journal of Computers and Applications, ACTA press, Canada, Vol.33, No.4, pp.316-325, 2011.
  37. Arun, M. and Krishnan, A. “Low Power Bloom Filter Architectures Using Multi Stage Lookup Techniques”, Australian Journal of Electrical & Electronics Engineering, Australia, Vol.8, No.3, pp.1-10,2011.
  38. Arun, M. and Krishnan, A. “Comparative Power Analysis of Precomputation Based Content Addressable Memory” Journal of Computer Science, Vol. 7, No. 4, pp. 471-474, 2011.
  39. Arun, M. and Krishnan, A. “Implementation of Content Addressable Memory Using Block XOR Based Pre Computation Technique in Reconfigurable Platform for Network Applications”, International Journal of Applied Engineering Research, Vol. 7, No.11, pp. 1877-1886, 2010.
  40. Arun, M. and Krishnan, A. “Multi Hashing Low Power Bloom Filter for Network Applications”, Romanian Journal of Computer Science and Control Systems, Vol. 3, No.1, pp. 7-12, 2010.
  41. Arun, M., Krishnan, A. and Periasamy, P.S. “Design and Implementation of a String Matching System for Network Intrusion Detection using FPGA-based low power multiple-hashing Bloom Filters”, International Journal of Computer Science and Applications, Vol. 1, No. 3, pp. 186-189, 2008.

Conference Proceedings
  1. Ghosh, J., Arun, M., “Adjustable Linear Actuator Based Power Seat for Occupational Disorders”, 6th International Conference on Advanced Computing and Communication Systems, ICACCS 2020, 2020, pp. 811-815. 
  2. Patel, V., Arun, M., “Fault Management Strategy and PWM Monitoring for HVAC ECU”, Proceedings of the 2nd International Conference on Electronics, Communication and Aerospace Technology, ICECA 2018, 2018, pp. 1736-1739. 
  3. Gulavani, P., Arun, M., “Automation Framework for Linux Audio”, Proceedings of the 2nd International Conference on Electronics, Communication and Aerospace Technology, ICECA 2018, 2018, pp. 1010-1013. 
  4. Garg, N., Jain, A., Arun, M., “Implementation of Analytical Tool for Power Analysis in Multi Core Modem”, Proceedings of the 2nd International Conference on Electronics, Communication and Aerospace Technology, ICECA 2018, 2018, pp. 1400-1403. 
  5. Shah, S., Manoj, P., Arun, M., “Module design for monitoring the health of CT Machine's Rotating frame”, 2018 3rd IEEE International Conference on Recent Trends in Electronics, Information and Communication Technology, RTEICT 2018 - Proceedings, 2018, pp. 445-449. 
  6. Bhanuteja, S., Shilpi, S., Pragna, K., Arun, M., “Smart security system for Indian rail wagons using IOT”, IOP Conference Series: Materials Science and Engineering, 2017, 263(5). 
  7. Singh, S., Paul, A., Arun, M., “Parallelization of digit recognition system using Deep Convolutional Neural Network on CUDA”, Proceedings of 2017 3rd IEEE International Conference on Sensing, Signal Processing and Security, ICSSS 2017, 2017, pp. 379-383.
  8. L. N. Sirisha Mrunalini, M. Arun, “Novel dual polarized graphene based antenna for wireless communications in THz band”, 2016 3rd IEEE International Conference on Emerging Electronics (ICEE), Mumbai, India.
  9. Uditi, Arun M. “Comparative analysis of parallelised shortest path algorithms using Open MP”, 2017 Third IEEE International Conference on Sensing, Signal Processing and Security (ICSSS), Chennai, India. DOI: 10.1109/SSPS.2017.8071622
  10. Chare, A.Dhakate, K.Joshi, N.Arun, M.Hariharasudhan, V., “Easy connect(eC)”, Proceedings - International Conference on Trends in Electronics and Informatics, ICEI 2017, 2018-January, pp. 1169-1174. 
  11. Srishti Singh, Amrit Paul, M. Arun, “Parallelization of digit recognition system using Deep Convolutional Neural Network on CUDA” 2017 Third IEEE International Conference on Sensing, Signal Processing and Security (ICSSS), Chennai, India. DOI: 10.1109/SSPS.2017.8071623
  12. Navada, S.Arun, M.Balasubramanian, S., “Bare-metal agent architecture for target communication framework”, Proceedings - International Conference on Trends in Electronics and Informatics, ICEI 2017, pp. 1100-1105.
  13. Arun, M. and Krishnan, A. “Theoretical Power Analysis of Multi Hashing Low Power Bloom Filter Architectures for Network Applications” was presented in International Conference on Mathematics and Computer Science(ICMCS 2010), Loyala College, Chennai, February 2010
  14. Arun, M. and Krishnan, A. “Multi Hashing Low Power Bloom Filter Architectures for Network Applications” was presented in IEEE International Conference on Advances in Computer Engineering (ACE 2010), Bangalore,July 2010
  15. Arun, M. and Krishnan, A. “Implementation of a string matching system for network Intrusion detection using FPGA based Low Power Multiple Hashing Bloom Filterers” was presented in International Conference on Advanced Computing organized by Anuradha College of Engineering, Shikli, MH, India, March,2008
  16. Arun, M. and Valluvan, K. “Development of Ethernet Card Device Driver for ARM9 in Embedded Linux” was presented in the National Conference on Modern Trends in Electrical Electronic Systems organized by Govt. College of Engineering, Salem, TN, India, March, 2006
  17. Participated in IT for IT 2004, A National Conference conducted by department of Electrical, Electronics & Instrumentation of Kongu Engineering College, Erode, TN, India, November 2004 

Special Lecture
  • Guest Lecture on " Internet of Things Security and Challenges" at AICTE sponsored Short Term Training Program on Artificial Intelligence, Machine Learning for Embedded Systems and IoT by Sri Krishna College of Engineering and Technology, Coimbatore, 19th Oct 2020.
  • Guest Lecture on "Internet of Things Security and Challenges" at AICTE sponsored ATAL Faculty Development Program by Dr. Mahalingam College of Engineering and Technology, Pollachi, 16th Sep 2020.
  • Guest Lecture on " LoRaWAN based IoT Applications for Automotive Sectors" at AICTE sponsored one Week Short Term Training Program on Automotive Embedded Systems using IoT by Sri Krishna College of Engineering and Technology, Coimbatore, 28th June 2020.
  • Webinar on "Satellite IoT Connectivity for LoRaWAN Technology" at SNS College of Technology, Coimbatore, 7th May 2020.
  • Webinar on "Electric Vehicles" at Tech Webinar Series 2020 of KSR College of Technology, Namakkal, 11th May 2020.
  • One day Technical Seminar on " LoRaWAN" at Vel Tech Engineering College, Chennai, 24th Jan 2020.
  • Guest Lecture on "Heterogeneous Embedded Computing" at AICTE Sponsored Faculty Development Program by Sri Krishna College of Technology, Coimbatore, 26th June 2018.
  • Lecture Series on "Software Project Management for Life Cycle Management of Powertrain Electronics" Automotive Research Association of India (ARAI), Pune, Feb 2018.
  • Lecture Series on "Software Project Management for Life Cycle Management of Powertrain Electronics" Automotive Research Association of India (ARAI), Pune, Dec 2017.
  • Lecture Series on "Software Project Management for Life Cycle Management of Powertrain Electronics" Automotive Research Association of India (ARAI), Pune, Dec 2016.
  • Key note address on “High Performance Reconfigurable Computing (HPRC) and Applications” at International Conference on Computer Communication and Informatics (ICCCI 2014) during 3rd to 5th Jan 2014, Sri Shakthi Institute of Engineering and Technology, Coimbatore.
  • Chief Guest Address and keynote address on “Embedded systems & RTOS – Research Perspective” at a two days AICTE Sponsored national seminar on “Embedded systems and Applications”, Excel College of Technology, Namakkal, 11th Oct 2013.
  • Key Note Address on "High Performance Reconfigurable Computing for Bioinformatics Applications" at  AICTE Sponsored FDP "Research and Reconfigurable Embedded System for Medical Science" on 15th May 2013, K S R Institute for Engineering and Technology, Tiruchengode.
  • Chief Guest Address on "Research in India - An Engineering Perspective" at National Symposium of Maharaja Engineering College, Coimbatore 13th Sep 2012
  • Guest Lecture on "Advanced Micro Processors and Controllers" at Sasurie College of Engineering, Tiruppur, 15th Nov 2012.
  • Lecture on "Consumer Electronics and RTOS" in AICTE Sponsored FDP on “Embedded system using ARM Processors” conducted by KSR College of Engineering, Tiruchengode. 
  • Guest Lecture on “Non-Conventional Energy and Industrial Automation”, In house Workshop, at Sasurie College of Engineering, Tiruppur, 2nd Aug 2014.
  • Lecture on "Operational Amplifiers", Faculty Development Programme on Electronic Devices and Ciruits, VIT University, 2nd July 2014
  • Guest Lecture on "Research Methodology with emphasis on Engineering Sciences", 30th Jan 2016


Member of Board of Studies

  • Member of Board of Studies, BTech ECE Spec. in IoT of VIT University, Vellore.
  • Member of Board of Studies, MTech Embedded System, VIT University, Vellore.
  • Member of Board of Studies, BTech ECE, VIT University, Vellore.
  • Member of Board of Studies, MTech Communication Engineering, VIT University, Vellore.
  • Subject Matter Expert, Course Development Committee, Distance Education, Manipal University, Manipal   
  • Member of Board of Studies, BE Electronics and Communication Engineering, Vellalar College of Engineering (Autonomous), Erode.
  • Member of Board of Studies, BE Electronics and Communication Engineering, Sri Krishna College of Engineering & Technology (Autonomous), Coimbatore.
  • Member of Board of Studies, Department of Electrical and Electronic Engineering, Muthayammal Engineering, Rasipuram.
Review, Advisory Committee Member of Journals,  Conferences
Workshops and Seminars
  • One day workshop on “Career Guidance and Counseling” conducted by National Institute of Technology(NITT), Tirchy
  • A one day Workshop on "Schoology : Learning Management Software (Digital Tools)" at VIT University, Vellore, Dec 2016.
  • Two day workshop on "IBM Bluemix" by ICTACT Training Team at VIT University, Vellore, Jan 2016.
  •  Programme on “Effective Proctoring” held at VIT University, Vellore, Dec 2015.
Programs Organized

  • Faculty Development Programme on Electronic Devices and Ciruits, VIT University, 2nd July 2014
  • CSIR Sponsored National Workshop on “RF Design using PLC Prototyping” at at KSR College of Engineering, Namakkal, Dec 2012
  • CSIR and DIT Sponsored Two day National Conference on Communication Technology Interventions for Social and Rural Development 2012 (NCCTIRD 2012), Sri Krishna College of Engineering and Technology, Coimbatore, India
  • Faculty Development Programme on “Innovative Teaching Skills l- Mission 10X” by Wipro Technologies, Bangalore at KSR College of Engineering, Namakkal
  • Training Programme on “Instructional Design and Delivery” by National Institute of Technical Teachers Training Research(NITTTR), Chennai at KSR College of Engineering, Namakkal
  • Faculty Development Programme by Helikx training Institute at KSR College of Engineering, Namakkal
  • Faculty Development Programme by Mafoi Ramstad, Chennai at KSR College of Engineering, Namakkal
  • One day workshop on Network Simulator - NETSIM at VIT University, Oct 2016.
  • One day Workshop on Network Security and Internet Forensics using MONOSEK at VIT University, Oct 2016. 
Subjects Taught
  • Advanced Embedded System, VLSI Design, Micro Processor and Controllers, Low power VLSI, Communication Protocol Engineering, Analog Circuit Design, High Performance Communication Networks, Parallel Processing and Computing
Question paper setting and Valuation Board Member
      
  
  • Anna University, Chennai
  • Anna University of TechnologyCoimbatore       
  •  Sathyabama Univesity, Chennai 
  •  Vinayaka Mission UniversitySalem
  • VIT University, Vellore
  •  Adhiyaman College of Engineering, Hosur
  •  Sona College of Technology, Salem
  •  KSR College of Technology, Namakkal
  • M Kumarasamy College of Engineering and Technology, Karur
  • Vivekanandhha College of Engineering and Technology for Women, Tiruchengode
  •  Karunya University, Coimbatore
    Kumaraguru Engineering College, Coimbatore
Countries Visited
  • Portugal
  • Malaysia
  • France
  • Belgium
  • UAE
  • Bhutan
Membership
  • Senior Member of IEEE (80614225)
  • Member of IET
  • Life Member of Indian Society and Technical Education MISTE
  • Life Memebr of ACEEE (1165)
  • Member of Indian Science Congress Association (A3353)
Personal Details 
  • Date of Birth : 15-12-1979                        
  • Citizenship : Indian                                       
  • Languages : English & Tamil              Marital Status : Married